Mohammed - Professional training tutor -
Mohammed - Professional training tutor -

Mohammed profile and its contact details have been verified by our team.

Mohammed

  • Rate $19
  • Response 1h
  • Students

    Number of students Mohammed has accompanied since arriving at Superprof

    1

    Number of students Mohammed has accompanied since arriving at Superprof

Mohammed - Professional training tutor -

$19/h

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  • Professional training

Explore ASIC Design and Verification from Experienced Verification Engineer. Learn skills such as Verilog, SystemVerilog and UVM. Also offers counselling services to choose and enhance your career in

  • Professional training

Lesson location

About Mohammed

I am currently working as a verification engineer. Expert in System Verilog constructs and UVM. Experienced in writing verification environment using System Verilog following Universal Verification Methodology (UVM). Having in-depth understanding of AMBA bus protocols like APB, AHB and AXI.

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About the lesson

  • Elementary School
  • Middle School
  • High School
  • +18
  • levels :

    Elementary School

    Middle School

    High School

    Première

    Terminale

    College

    Adult Education

    Masters/ Graduate School

    Doctorate

    MBA

    ILR Level 0

    ILR Level 1

    ILR Level 2

    ILR Level 3

    ILR Level 4

    ILR Level 5

    Beginner

    Intermediate

    Advanced

    Proficient

    Children

  • English

All languages in which the lesson is available :

English

My teaching method includes less ppt and more live coding examples. Picking up real time projects and building foundational understanding from it. By the end of the course you will have a understanding of a test plan, how to implement a complete test environment using the language and complete verification flow with a major project.

Course will also include design and verification using Verilog and creating a self-checking testbench from pure Verilog and than slowly implementing it in SystemVerilog and than introducing UVM.

By the end of the verilog module you will have a confidence to design circuits using just 4 modules (Vectored mux, vectored comparator, vectored adder and vectored D flip-flop). All the relevant materials and recordings will be shared for reference.

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Rates

Rate

  • $19

Pack rates

  • 5 h: $76
  • 10 h: $152

online

  • $19/h

Mohammed's Video

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